JEDEC JESD301-1A.02 Historical

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PMIC50x0 Power Management IC Standard, Rev. 1.8.5

standard by JEDEC Solid State Technology Association , 03/01/2023

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Full Description

This standard defines the specifications of interface parameters, signaling protocols, and features for PMIC device as used for memory module applications. The designation PMIC5000, PMIC5010 refers to the device specified by this document.

The purpose is to provide a standard for the PMIC5000, PMIC5010 device for uniformity, multiplicity of sources, elimination of confusion, ease of device specification, and ease of use.

Unless otherwise noted in the document, any illegal operation is not allowed and device operation is not guaranteed.

NOTE: The designation PMIC5000, PMIC5010 refers to a portion of the part number designation of a series of commercial logic devices common in the industry. This number is normally preceded by a series of manufacturer specific characters to make up a complete part designation.

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Document History

  1. JEDEC JESD301-1A.03


    PMIC5000/PMIC5010 Power Management IC Standard, Rev. 1.8.5

    • Most Recent

  2. JEDEC JESD301-1A.02

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    PMIC50x0 Power Management IC Standard, Rev. 1.8.5

    • Historical Version

  3. JEDEC JESD301-1A.01


    PMIC50x0 POWER MANAGEMENT IC SPECIFICATION, Rev. 1.83

    • Historical Version

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Product Details

Published:

03/01/2023

Number of Pages:

208

File Size:

1 file

Note:

This product is restricted and cannot be purchased in the following countries Russia, Belarus